Senior Verification Engineer – UVM, SoC & DSP

Job Description

A leading global semiconductor company in Edinburgh is looking for a Verification Engineer to own the verification process for key digital IP blocks. The role requires at least 5 years of experience in digital verification, excellent skills in UVM-based testbench infrastructure, and proficiency in Verilog and SystemVerilog. This position offers a collaborative environment focused on professional development and innovative solutions, aimed at meeting consumer market demands.