Senior Design Verification Engineer – Remote/Hybrid ASIC

Job Description

A leading semiconductor company in Edinburgh is seeking a Senior Design Verification Engineer to ensure the correctness and robustness of complex ASIC designs. In this role, you will develop verification plans, create UVM-based SystemVerilog testbenches, and collaborate with design engineers. The ideal candidate has over 5 years of experience and strong skills in SystemVerilog and UVM. This position offers competitive salary, RSUs, and flexible working options including remote work for UK-based engineers.