Digital Verification Engineer: SystemVerilog & UVM Expert

Job Description

NXP in the United Kingdom is seeking a verification engineer with a strong background in SystemVerilog, UVM, and constrained random verification to verify digital hardware architectures and co-processors. You will develop strategies, tests, and environments for security features, and help evolve verification methodologies across projects.

Ideal candidates hold a BSc/MSc in Electronics or Electrical Engineering and demonstrate proficiency in SVA, coverage closure, and debugging within complex