Principal Silicon Design Verification Engineer

Engineering
Scotland
March 8, 2026
Permanent
Urgent

Job Description

Company description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, youll discover the real differentiator is our culture. We push the limits of innovation to solve the worlds most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Job description

AMD is looking for a talented individual to join the Network Technology Solutions Group in the Data Center Solutions Group as Principal Design Verification Engineer in our Edinburgh office. This team develops RTL blocks and subsystems for the AMD Pensando AI NIC product line, allowing GPU clusters to be built to support AI training and inference workloads at scale.

KEY RESPONSIBILITIES:

As a Principal Design Verification Engineer, you will lead the verification efforts to functionally verify complex RTL blocks destined for the next generation of Data Center networking ASICs.

Required profile

ABOUT YOU:

  • Experience of working as a technical lead in a verification team
  • Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems.
  • Strong experience in UVM-based verification in SystemVerilog, with a deep understanding of the framework.
  • Experience of verification coverage closure in an ASIC or FPGA project.
  • Strong problem-solving skills.
  • Experience of Synopsys functional verification tools would be an advantage.
  • Experience of full chip verification would be an advantage.
  • Experience of formal verification would be an advantage.
  • Knowledge of AI-based debug techniques would be an advantage.
  • Knowledge of Python would be an advantage.
  • Experience in C/C++ would be an advantage.
  • RTL design experience would be an advantage.
  • Experience in networking technologies and products would be an advantage.

ACADEMIC CREDENTIALS:

Minimum of a Degree/Masters in Electronic Engineering, Computer Science or a related subject.

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